Robert H. Dennard

Born 1932, Terrell, Texas; National Medal of Technology winner for IBM invention of the basic, one-transistor dynamic memory cell used in virtually all modern computers.

Education: BS, electrical engineering, Southern Methodist University, 1954; MS, electrical engineering, Southern Methodist University, 1956; PhD, Carnegie Institute of Technology, 1958.

Professional Experience: IBM: Research Division, 1958-present; Thomas J. Watson Research Center, Yorktown Heights, 1963-present.

Honors and Awards: member, National Academy of Engineering, 1984; IBM fellow, 1979; fellow, IEEE, 1980; National Medal of Technology, 1988; IEEE Cledo Brunetti Award, 1982; Industrial Research Institute Achievement Award, 1989; Harvey Prize, Technion, Haifa, Israel, 1990; DSc (Hon.), State University of New York, Farmingdale, 1990; six IBM Outstanding Invention and Outstanding Contribution Awards; two IBM Corporate Awards.

Robert Dennard joined the IBM Research Division in 1958, where his early work included the study of new devices and circuits for logic and memory applications, and the development of advanced data communication techniques. Since 1963 he has been at the IBM Thomas J. Watson Research Center, Yorktown Heights, New York, where he has been involved in research and development of microelectronics from its inception.

Starting in the mid-1960s, he was a leader in the development of IBM's N-channel MOSFET [MOSFET—metal-oxide-semiconductor field effect transistor] devices and technology. This work led to the first IBM MOSFET memory products in the early 1970s, and a number of his circuit and device innovations were in the products. In 1967, he invented the one-transistor DRAM memory cell and obtained a basic patent for IBM. In the early 1970s, he led a group working on scaling MOSFET devices to smaller dimensions, and in 1974 published, with his colleagues, the historic paper on MOSFET device scaling theory. In the 1970s he also worked on yield models for integrated circuits, which led to development of the theoretical base for word and bit line redundancy in DRAMs. In recognition of his contributions, he was appointed an IBM fellow in 1979. Through the 1980s to the present, he has continued to be a leader in the IBM efforts to miniaturize devices and integrated circuits. This work has culminated in the demonstration of sub-0.1-micron MOS devices. He has also been a leader in setting directions for IBM technology research and development.

Dr. Dennard has received six IBM Outstanding Invention and Outstanding Contribution Awards, and two IBM Corporate Awards. The invention and contribution awards were for:

  1. MOSFET device design,
  2. the MOSFET technology and device design manual used throughout the company in the early days of MOSFET development,
  3. the one-transistor DRAM memory cell,
  4. word and bit line redundancy,
  5. MOSFET scaling theory, and
  6. 1-micron latch-up-free CMOS technology development.

The corporate awards were for the 1-transistor memory cell and for the MOSFET scaling theory.


Dennard has also received the following awards: IEEE Edison Medal (2001); The Franklin Institute Benjamin Franklin Medal (2007); Charles Stark Draper Prize (2009); IEEE Medal of Honor (2009); Honorary DSc from Carnegie Mellon University (2010).

Photo added (MRW, 2012)

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